Assist in ATPG generation, pattern simulation and regression.

Assist in automating the verification tasks.

Assist in silicon turn-on and debug.

Completed minimum three years toward completion of BS or pursuing MS in Electrical Engineering/Computer Engineering/Computer Science with GPA ≥ 3.5 in core subjects

Completed C/C++, Python and Data structure related courses

Completed or currently pursuing VLSI design or verification related courses. Verification related coarse like System Verilog, UVM etc. will be a plus

Completed course projects using Verilog/VHDL/System Verilog.

Strong understanding of electronic design fundamentals.

Excellent written and verbal communication skills.

Strong interest in pursuing an engineering career with a fast-paced high technology company.